Programable digital systems



PDS - Lab

• Exercise 1 - Getting started with usage of ActiveHDL and with Verilog syntax
• Exercise 2 - Hardware implementation of simple pseudo-random number generators
• Exercise 3 - Hardware implementation of BIN to BCD conversion
• Exercise 4 - Arithmetic Logic Units
• Exercise 5 - FIFO LIFO
• Exercise 7 - Testbench for Reverse Polish notation project