Chair of Multimedia Telecommunications and Microelectronics


Agnieszka Wardzińska

Agnieszka Wardzińska


Received M.Sc. degree in 2002 and a Ph.D. in 2009 from Poznan University of Technology. The main area of his research activities is interconnect modelling and simulation.

Contact

Room: 105 (Polanka)
Phone: +48 61 665 3847
Mail: agnieszka.wardzinska@put.poznan.pl
www: http://cygnus.et.put.poznan.pl/~award

Advisor hours

Mon 9.00-10.00, Wed 10.00-11.00

Publications

Books

International journals

International conferences

  1. Agnieszka Wardzińska, Wojciech Bandurski,
    Frequency dependent and Nonuniform Parameters Transmission Line Model,
    20th IEEE Workshop on Signal and Power Integrity SPI 2016, Torino, Italy, May 8-11, 2016,
    Full textEndNoteCitation
  2. Agnieszka Wardzińska, Wojciech Bandurski,
    Time Domain Simulation for Multiconductor Transmission Line Model with Frequency Dependent Parameters,
    International Symposium and Exhibition on Electromagnetic Compatibility EMC Europe 2016, Wroclaw, Poland, September 5-9, 2016,
    Full textEndNoteCitation
  3. Agnieszka Wardzińska, Wojciech Bandurski,
    Step response sensitivity of VLSI Interconnects,
    17th Workshop on Signal and Power Integrity SPI 2013, Paris, France, 12-15 May 2013,
    Full textEndNoteCitation
  4. Wojciech Bandurski, Agnieszka Wardzińska,
    Step response calculation of VLSI low loss inter – connect using S-parameters,
    International Conference on Signal and Electronics Systems, ICSES 2012, Wrocław, Poland, 18-21 September 2012, ISBN: 978-1-4673-1710-8,
    Full textEndNoteCitationDOI
  5. Agnieszka Wardzińska, Wojciech Bandurski,
    Overshoot and Clock Skew in inverter-interconnect-inverter in VLIS systems,
    2011 IEEE 15th Workshop on Signal Propagation on Interconnects (SPI), Naples, Italy, 8-11 May 2011, pp. 147-150,
    EndNoteCitation
  6. Agnieszka Wardzińska, Wojciech Bandurski,
    VLSI low loss InterConnect scattering parametres,
    European Conference on Circuit Theory and Design, Linkoping, Sweden, 29-31 August 2011,
    EndNoteCitation
  7. Agnieszka Wardzińska, Wojciech Bandurski,
    Step Response to Sensitivity to RLC Parametres of VLSI Interconnect,
    7th IEEE International Conference on Signals and Electronic Systems, Gliwice, Poland, 7-10 September 2010,
    Full textEndNoteCitation
  8. Agnieszka Wardzińska, Wojciech Bandurski,
    Sensitivity of threshold crossing time to geometrical dimensions of VLSI interconnects,
    16th International Conference Mixed Design of Integrated Circuits and Systems, Łódź, Poland, 25-27 June 2009,
    Full textEndNoteCitation
  9. Agnieszka Wardzińska, Wojciech Bandurski,
    Sensitivity of output response to geometrical dimensions in VLSI interconnects,
    13th IEEE Workshop on Signal Propagation on Interconnects, Strasbourg, France, 12-15 May 2009,
    Full textEndNoteCitation

National journals

Dissertations

  1. Agnieszka Wardzińska,
    Wpływ indukcyjności na propagację sygnału w połączeniach układów VLSI,
    PhD Dissertation at Poznan University of Technology, Faculty of Electronics and Telecommunications, 2009,
    Supervisor: prof. dr hab. inż. Wojciech Bandurski, Reviewers: prof. dr hab. inż. Marek Domański, prof. dr hab. inż. Andrzej Napieralski,
    EndNoteCitation

2017

2016

  1. Agnieszka Wardzińska, Wojciech Bandurski,
    Frequency dependent and Nonuniform Parameters Transmission Line Model,
    20th IEEE Workshop on Signal and Power Integrity SPI 2016, Torino, Italy, May 8-11, 2016,
    Full textEndNoteCitation

  2. Agnieszka Wardzińska, Wojciech Bandurski,
    Time Domain Simulation for Multiconductor Transmission Line Model with Frequency Dependent Parameters,
    International Symposium and Exhibition on Electromagnetic Compatibility EMC Europe 2016, Wroclaw, Poland, September 5-9, 2016,
    Full textEndNoteCitation

2015

2014

2013

  1. Agnieszka Wardzińska, Wojciech Bandurski,
    Step response sensitivity of VLSI Interconnects,
    17th Workshop on Signal and Power Integrity SPI 2013, Paris, France, 12-15 May 2013,
    Full textEndNoteCitation

2012

  1. Wojciech Bandurski, Agnieszka Wardzińska,
    Step response calculation of VLSI low loss inter – connect using S-parameters,
    International Conference on Signal and Electronics Systems, ICSES 2012, Wrocław, Poland, 18-21 September 2012, ISBN: 978-1-4673-1710-8,
    Full textEndNoteCitationDOI

2011

  1. Agnieszka Wardzińska, Wojciech Bandurski,
    Overshoot and Clock Skew in inverter-interconnect-inverter in VLIS systems,
    2011 IEEE 15th Workshop on Signal Propagation on Interconnects (SPI), Naples, Italy, 8-11 May 2011, pp. 147-150,
    EndNoteCitation

  2. Agnieszka Wardzińska, Wojciech Bandurski,
    VLSI low loss InterConnect scattering parametres,
    European Conference on Circuit Theory and Design, Linkoping, Sweden, 29-31 August 2011,
    EndNoteCitation

2010

  1. Agnieszka Wardzińska, Wojciech Bandurski,
    Step Response to Sensitivity to RLC Parametres of VLSI Interconnect,
    7th IEEE International Conference on Signals and Electronic Systems, Gliwice, Poland, 7-10 September 2010,
    Full textEndNoteCitation

2009

  1. Agnieszka Wardzińska,
    Wpływ indukcyjności na propagację sygnału w połączeniach układów VLSI,
    PhD Dissertation at Poznan University of Technology, Faculty of Electronics and Telecommunications, 2009,
    Supervisor: prof. dr hab. inż. Wojciech Bandurski, Reviewers: prof. dr hab. inż. Marek Domański, prof. dr hab. inż. Andrzej Napieralski,
    EndNoteCitation

  2. Agnieszka Wardzińska, Wojciech Bandurski,
    Sensitivity of threshold crossing time to geometrical dimensions of VLSI interconnects,
    16th International Conference Mixed Design of Integrated Circuits and Systems, Łódź, Poland, 25-27 June 2009,
    Full textEndNoteCitation

  3. Agnieszka Wardzińska, Wojciech Bandurski,
    Sensitivity of output response to geometrical dimensions in VLSI interconnects,
    13th IEEE Workshop on Signal Propagation on Interconnects, Strasbourg, France, 12-15 May 2009,
    Full textEndNoteCitation